Event Overview
LPDDR5X SI/PI Simulation and Evaluation Challenges
Conquer the mobile challenge with MIPI C-PHY analysis
Explore how advanced SI/PI timing analysis accelerates DDR interface design for high-performance systems. Learn how Socionext, in collaboration with Keysight, developed a unique DDR SI/PI/Timing Verification Environment to analyze LPDDR5X-8533 Mbps interfaces with speed and precision, ensuring faster time-to-market for large-scale computing systems.
Agenda
- Challenges for the DDR Interface in Advanced, Large-Scale SoC
- Development of LPDDR5X SI/PI Analysis Environment
- Validation of LPDDR5X SI/PI Analysis Environment
- Summary and Future Expectations
Event Details
Date & Time
March 12, 2025 at 1:10PM
Location
Franklin Room
Keysight Technologies
5301 Stevens Creek Blvd.
Santa Clara, CA 95051
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