Socionext America

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Socionext America, Inc.
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Home > High-performance & Custom ASIC

ASSP-based Development

July 10, 2020

ASSP Dev - image 1

  Developing a custom SoC based on an ASSP with a proven track record in the market not only makes it easy to design the components surrounding the CPU and the subsystems. It also has the advantage of easier development and evaluation because related software is also already provided. Benefits From our experience of ASSP-based Read More

Automotive Custom SoCs

June 10, 2020

Automotive Custom Soc Header

  Socionext, a leader in custom Soc (ASIC), has been designing and developing custom SOC products for automotive applications for many years. Our customers appreciate our combination of strong engineering expertise and use of cutting edge technology to craft customized, high-performance, automotive SoC solutions, that meet the rigorous demands of any mobility system. Socionext is Read More

PCB Co-design

May 24, 2018

Socionext achieves perfect operation on the first attempt through LSI development based on the chip, package, and PCB co-design flow. While offering a good forecast for design through reference design, we develop and improve LSI models (IBIS, timing model, LSI power supply model) necessary for transmission line analysis of DDR4 and other memory interfaces and Read More

Low Power Design Solutions

May 24, 2018

Low Power Design Solution The demand for reducing the power consumption of LSIs has been getting stronger in recent years. In our SoC design efforts, we are undertaking various initiatives to meet customers’ demands for lower power consumption. In order to achieve low power consumption LSIs, it is effective to combine various kinds of technologies Read More

Back-end Design

May 24, 2018

We layout customer design with our high-accuracy analysis technology, high performance synthesis, placement, routing, and high speed technology, and low noise design technology. Physical aware Logic synthesis Due to the increase of circuit size and routing load, the gap between the time estimation of logic synthesis and layout is widening. At Socionext, we minimize the Read More

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